Computer hard disk drives, also known as fixed disk drives or hard disk drives, have become a de facto data storage standard for computer systems. Their proliferation can be directly attributed to their low cost, high storage capacity and reliability, in addition to wide availability, low power consumption, fast data transfer speeds and decreasing physical size.
Disk drives typically include one or more rotating magnetic platters encased within an environmentally controlled housing. The hard drive may have several read/write heads that interface with the magnetic platters. The disk drive may further include electronics for reading and writing data and for interfacing with other devices. The electronics are coupled with the read/write heads and include circuits to control head positioning and to generate or sense electromagnetic fields on the platters. The electronics encode data received from a host device, such as a personal computer, and translate the data into magnetic encodings, which are written onto the platters. When data is requested, the electronics locate the data, sense the magnetic encodings, and translate the encodings into binary digital information. Error checking and correction may also be applied to ensure accurate storage and retrieval of data.
The read/write heads detect and record the encoded data as areas of magnetic flux. The data are encoded by the presence or absence of a flux reversal between two contiguous areas of the platter. Data may be read using a method known as xe2x80x9cPeak Detectionxe2x80x9d by which a voltage peak imparted in the read/write head is detected when a flux reversal passes the read/write head. However, increasing storage densities, requiring reduced peak amplitudes, better signal discrimination and higher platter rotational speeds are pushing the peaks in closer proximity. Thus, peak detection methods are becoming increasingly complex.
Advancements in read/write heads and in the methods of interpreting magnetic encodings have been made. For example, magneto-resistive (xe2x80x9cMRxe2x80x9d) read/write heads have been designed with increased sensitivity and increased signal discrimination. In addition, technology known as Partial Response Maximum Likelihood (xe2x80x9cPRMLxe2x80x9d) has been developed. PRML disk drives function based an algorithm implemented in the disk drive electronics to read analog waveforms generated by the magnetic flux reversals. Instead of looking for peak values, PRML based drives digitally sample the analog waveform (the xe2x80x9cPartial Responsexe2x80x9d) and carry out advanced signal processing techniques to determine a most-likely bit pattern represented by the wave form (the xe2x80x9cMaximum Likelihoodxe2x80x9d). PRML technology tolerates more noise in the magnetic signals, permitting use of lower quality platters and read/write heads, which also increases manufacturing yields and lowers costs.
With hard drives typically differentiated by factors such as cost/unit of storage, data transfer rate, power requirement, and form factor (physical dimensions), there is a need for enhanced hard drive components which prove cost effective in increasing storage capacity, operating speed, reliability and power efficiency. An example of an area includes PRML electronics for writing data having a write output driver circuit. The write output driver circuit provides transfer of a high-speed digital signal to the read/write head for recording data to the platters. Output driver circuits have included transistors configured with an open drain for driving externally coupled pull-up resistor devices. The external resistive devices draw output currents that cause a large voltage drop across the transmission lines at the high speeds of the signal. These designs may increase the cost and size of the output driver circuit. Another design includes configuring an output differential circuit with an internal source follower circuit. Application of these circuits may be limited because the output resistance of the source follower may vary with time and may be affected by environmental conditions, such as ambient temperature.
Accordingly, there is a need in the art for a write output driver having internal programmable pull-up resistors.
A write output driver for use in a partial response, maximum likelihood (xe2x80x9cPRMLxe2x80x9d) read/write channel is disclosed. The write output driver includes internal programmable pull-up devices configured to drive a high-speed output voltage with low output impedance. The output driver may be provided in a data write circuit of a PRML based hard disk drive. The write output driver having internal programmable pull-up resistive devices provides an environmentally stable circuit capable of driving a high-speed output signal.
An embodiment for a write output driver may include a tail current source; a differential switch circuit; an internal pull-up circuit; and a second bias signal generator. The tail current source is coupled between a tail current node and a negative supply voltage node. The tail current source generates a tail current at the tail current node in response to a first bias signal applied at a first bias input node. The tail current is proportional to the first bias signal. The tail current source is biased to provide a desired current at a first output node and a second output node.
The differential switch circuit includes an input node to receiving a differential input voltage. The differential switch is coupled with the tail current node and may be configured to selectively switch the tail current between the first output node and the second output node in response to the input voltage.
The internal pull-up circuit is coupled with the first output node and the second output node. The internal pull-up circuit includes a second bias signal input node for receiving a second bias signal. The pull-up circuit generates an output voltage between the first output node and the second output node in response to the tail current at the output nodes. The pull-up circuit has an output impedance that may be programmed based on the second bias signal.
In an embodiment, the second bias signal generator controls the second bias signal to compensate for changes in the output impedance for the pull-up circuit due to ambient fluctuations. The second bias signal generator has an output impedance that is calibrated with a low-tolerance resistive device. The output impedance of the second bias signal generator is calibrated to an impedance that is proportionally matched with the internal pull-up circuit.
An embodiment of a method for driving a high-speed signal includes the acts of receiving a high-speed voltage signal at a differential voltage input; selectively switching a tail current between a first output node and a second output node in response to the high-speed voltage signal at the differential voltage input; programming an internal pull-up circuit to generate an output voltage with low output impedance at the first output node and at the second output node in response to tail current at the first output node and the second output node; calibrating an internal bias voltage source to have an output impedance substantially matched with the output impedance of the internal pull-up circuit; and controlling the calibrated bias voltage source to provide a bias voltage to maintain a substantially constant output impedance for the internal pull-up circuit.
The foregoing discussion of the summary of the invention is provided only by way of introduction. Nothing in this section should be taken as a limitation on the claims, which define the scope of the invention. Additional objects and advantages of the present invention will be set forth in the description that follows, and in part will be obvious from the description, or may be learned by practice of the present invention. The objects and advantages of the present invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the claims.